A computational study of ballistic silicon nanowire transistors

@article{Wang2003ACS,
  title={A computational study of ballistic silicon nanowire transistors},
  author={Jian Wang and Eric Polizzi and M. S. Lundstrom},
  journal={IEEE International Electron Devices Meeting 2003},
  year={2003},
  pages={29.5.1-29.5.4}
}
Using a rigorous 3D quantum simulator, we report a computational study of ballistic silicon nanowire transistors with arbitrary cross sections (i.e., triangular, rectangular or cylindrical). In comparison with the planar double-gate MOSFET, the silicon nanowire transistor shows promise (e.g., better electrostatic scaling for a given Si body thickness) and may provide a manufacturable opportunity to scale silicon transistors down below the scaling limit of planar MOSFETs. 
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