A compiler for scalable placement and routing of brain-like architectures

@inproceedings{Srinivasa2013ACF,
  title={A compiler for scalable placement and routing of brain-like architectures},
  author={Narayan Srinivasa},
  booktitle={ISPD},
  year={2013}
}
The challenging aspect of building neuromorphic circuits in mature CMOS technology to match brain-like architectures is two-fold: scalability and connectivity. Scalability means that the circuits have to be expandable to match biological brains in terms of synaptic and neuronal densities. The challenge here is to implement 106 neurons and 1010 synapses with an average fanout of 104, in a square cm of CMOS [1, 2]. Connectivity means that the circuit has to offer the capability to have both short… CONTINUE READING