A closed-form expression for estimating minimum operating voltage (V<inf>DDmin</inf>) of CMOS logic gates

Abstract

In this paper, a closed-form expression for estimating a minimum operating voltage (V<inf>DDmin</inf>) of CMOS logic gates is proposed. V<inf>DDmin</inf> is defined as the minimum supply voltage at which circuits can operate correctly. V<inf>DDmin</inf> of combinational circuits can be written as a linear function of the square-root of logarithm of the… (More)

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