A chip-stacked memory for on-chip SRAM-rich SoCs and processors

@article{Saito2009ACM,
  title={A chip-stacked memory for on-chip SRAM-rich SoCs and processors},
  author={Hideaki Saito and Masayuki Nakajima and Takumi Okamoto and Yusuke Yamada and Akira Ohuchi and Noriyuki Iguchi and Toshitsugu Sakamoto and Koichi Yamaguchi and Masayuki Mizuno},
  journal={2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers},
  year={2009},
  pages={60-61,61a}
}
Advanced SoC chips used in multimedia devices such as mobile phones have a number of dedicated functional IP cores, including 3D graphics and video codec, and require local memories with high bit density. Each IP core is connected to closely positioned local memories for fast access and wide bandwidth. The simultaneous operation of all of IP cores on a chip is an extremely rare situation and we anticipate that future integration of more IP cores onto a chip will increase the average number of… CONTINUE READING
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