A charge-pump circuit to restrain reference spurs in the PLL

@article{Huan2011ACC,
  title={A charge-pump circuit to restrain reference spurs in the PLL},
  author={Changhong Huan and Xiushan Wu and Dan Wang},
  journal={2011 9th IEEE International Conference on ASIC},
  year={2011},
  pages={1010-1013}
}
In the charge pump phase locked loop (CPPLL), the non-ideal characteristics of charge pump are the main causes of the reference spurs. Therefore, reducing the variety of non-ideal characteristics is one of the challenges in the CP design. In this paper, an improved charge pump circuit, based on the TSMC's 0.18µmCMOS process, has been designed and completed. An operational amplifier and self-biasing cascode current mirror and supply-independent reference current source are used in the CP design… CONTINUE READING
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Reduction of pump current mismatch in charge-pump PLL

  • M. S. Hwang, J. Kim, D.-K. Jeong
  • Electronics Letters, Vol.45,
  • 2009
1 Excerpt

CMOS PLL Synthesizer: Analysis and Design[M

  • Keliu Shu etal
  • Beijing: Science Press,
  • 2007
1 Excerpt

Architecture Design and Analysis of CMOS Charge Pump[J

  • LIU Xiaoyan, Y E Qing
  • Science Technology and Engineering,
  • 2006
1 Excerpt

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