A cell-based power estimation in CMOS combinational circuits

  title={A cell-based power estimation in CMOS combinational circuits},
  author={Jiing-Yuan Lin and Tai-Chien Liu and Wen-Zen Shen},
In this paper we present a power dissipation model considering the charging/discharging of capacitance at the gate output node as well as internal nodes, and capacitance feedthrough effect. Based on the model, a Cell-Based Power Estimation (CBPE) method is developed to estimate the power dissipation in CMOS combinational circuits. In our technique, we first construct a modified state transition graph called STGPE to model the power consumption behavior of a logic gate. Then, according to the… CONTINUE READING
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