A case for hardened multiplexers in FPGAs

@article{Chin2013ACF,
  title={A case for hardened multiplexers in FPGAs},
  author={S. Alexander Chin and Jason Helge Anderson},
  journal={2013 International Conference on Field-Programmable Technology (FPT)},
  year={2013},
  pages={42-49}
}
This paper presents a case for a hybrid configurable logic block that contains a mixture of LUTs and hardened multiplexers towards the goal of higher logic density and area reduction. Technology mapping optimizations, called MuxMap, that target the proposed architecture are implemented using a modified version of the mapper in the ABC logic synthesis tool. VPR is used to model the new hybrid configurable logic block and verify post place and route implementation. Multiple hybrid configurable… CONTINUE READING