A VLSI architecture for lifting-based wavelet transform

  title={A VLSI architecture for lifting-based wavelet transform},
  author={K. Andra and C. Chakrabarti and T. Acharya},
  journal={2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528)},
  • K. Andra, C. Chakrabarti, T. Acharya
  • Published 2000
  • Computer Science
  • 2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528)
  • The discrete wavelet transform (DWT) is the basis for many image compression techniques, such as the upcoming JEPG2000. Lifting-based DWT requires fewer computations compared to the traditional convolution-based approach. In this paper, we propose a VLSI architecture to compute lifting-based 2D DWT, for a set of seven filters recommended in the JPEG2000 verification model. The architecture produces transform coefficients in every clock cycle for three of the filters and in every alternate cycle… CONTINUE READING
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