A Unified Framework for the Formal Verification of Sequential Circuits


Hardware description languages (HDLs) dramatically change the way circuit designers work. These languages can be used to describe circuits at a very high level of abstraction, which allows the designers to specify the behavior of a circuit before realizing it. The validation of these specifications is currently done by executing them, which is very costly… (More)
DOI: 10.1109/ICCAD.1990.129859


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