A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor

@inproceedings{Mukherjee2003ASM,
  title={A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor},
  author={Shubhendu S. Mukherjee and Christopher T. Weaver and Joel S. Emer and Steven K. Reinhardt and Todd M. Austin},
  booktitle={MICRO},
  year={2003}
}
Single-event upsets from particle strikes have become akey challenge in microprocessor design. Techniques todeal with these transient faults exist, but come at a cost.Designers clearly require accurate estimates of processorerror rates to make appropriate cost/reliability trade-offs.This paper describes a method for generating theseestimates.A key aspect of this analysis is that some single-bit faults(such as those occurring in the branch predictor) will notproduce an error in a program's… CONTINUE READING