A Suggestion for a Fast Multiplier

@article{Wallace1964ASF,
  title={A Suggestion for a Fast Multiplier},
  author={C. Wallace},
  journal={IEEE Trans. Electron. Comput.},
  year={1964},
  volume={13},
  pages={14-17}
}
  • C. Wallace
  • Published 1964
  • Computer Science
  • IEEE Trans. Electron. Comput.
It is suggested that the economics of present large-scale scientific computers could benefit from a greater investment in hardware to mechanize multiplication and division than is now common. As a move in this direction, a design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step. Using straightforward diode-transistor logic, it appears presently possible to obtain products in under 1, ?sec, and quotients in 3 ?sec… Expand
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  • Mathematics, Computer Science
  • IEEE Trans. Electron. Comput.
  • 1967
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  • 2016
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References

A parallel arithmetic unit using a saturated-transistor fast-carry circuit
The paper describes a transistor switch technique which is of particular importance in applications where a large number of switches have to be connected in series and where the propagation time ofExpand