A Suggestion for a Fast Multiplier

  title={A Suggestion for a Fast Multiplier},
  author={C. Wallace},
  journal={IEEE Trans. Electron. Comput.},
  • C. Wallace
  • Published 1964
  • Computer Science
  • IEEE Trans. Electron. Comput.
It is suggested that the economics of present large-scale scientific computers could benefit from a greater investment in hardware to mechanize multiplication and division than is now common. As a move in this direction, a design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step. Using straightforward diode-transistor logic, it appears presently possible to obtain products in under 1, ?sec, and quotients in 3 ?sec… Expand
A Division Method Using a Parallel Multiplier
  • D. Ferrari
  • Mathematics, Computer Science
  • IEEE Trans. Electron. Comput.
  • 1967
A similar algorithm for the generation of a piecewise-linear initial approximation to the reciprocal of the divisor is presented and it is shown that the latter is more accurate. Expand
A Suggestion for a Fast Multiplier
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A theoretical analysis of square versus rectangular component multipliers in recursive multiplication
  • B. Parhami
  • Mathematics, Computer Science
  • 2016 50th Asilomar Conference on Signals, Systems and Computers
  • 2016
This work deals with the general problem of synthesizing a possibly non-square k χ l multiplier from b × c component multipliers or multiply-add modules, demonstrating that in many cases, the use of rectangular components leads to speed and cost benefits. Expand


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The paper describes a transistor switch technique which is of particular importance in applications where a large number of switches have to be connected in series and where the propagation time ofExpand