A Study of Out-of-Order Completion for the MIPS R10K Superscalar Processor
@inproceedings{Mishra2001ASO, title={A Study of Out-of-Order Completion for the MIPS R10K Superscalar Processor}, author={P. Mishra and N. Dutt and Alex Nicolau pmishra}, year={2001} }
Instruction level parallelism (ILP) improves performance for VLIW, EPIC, and Superscalar processors. Out-of-order execution improves performance further. The advantage of out-of-order execution is not fully utilized due to in-order completion. In this report we study the performance loss due to in-order completion for MIPS R10000 processor.
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References
SHOWING 1-9 OF 9 REFERENCES
Available instruction-level parallelism for superscalar and superpipelined machines
- Computer Science
- ASPLOS III
- 1989
- 267
- PDF
Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques
- Computer Science
- IEEE Trans. Computers
- 1999
- 111
- PDF
V-SAT: A visual specification and analysis tool for system-on-chip exploration
- Computer Science
- J. Syst. Archit.
- 2001
- 26
- PDF
EXPRESSION: a language for architecture exploration through compiler/simulator retargetability
- Computer Science
- Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)
- 1999
- 451
- PDF
Trailblazing: A Hierarchical Approach to Percolation Scheduling
- Computer Science
- 1993 International Conference on Parallel Processing - ICPP'93
- 1993
- 65
Seddighnezhad. 200-mhz superscalar risc microprocessor.IEEE Journal of Solid-State Circuits
- 1996
Processor-memory co-exploration driven by an architectural description language
- In Intl. Conf. on VLSI Design
- 2001