A Software Transactional Memory System for an Asymmetric Processor Architecture

@article{Goldstein2008AST,
  title={A Software Transactional Memory System for an Asymmetric Processor Architecture},
  author={F. Goldstein and A. Baldassin and P. Centoducatte and R. Azevedo and L. G. Garcia},
  journal={2008 20th International Symposium on Computer Architecture and High Performance Computing},
  year={2008},
  pages={175-182}
}
Due to the advent of multi-core processors and the consequent need for better concurrent programming abstractions, new synchronization paradigms have emerged. A promising one, known as software transactional memory (STM), aims to use transactions as the key synchronization mechanism to ease program development as well as increase its performance. Many (if not all) of the current STM implementations target homogeneous architectures. In this paper we describe an implementation of an STM system… Expand

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