A Software Engineering Methodology to Optimize Caching in Multi-processor DSP Architectures: TMS320C80 Results towards the Real-time Execution of Low Level Image Processing

Abstract

This paper introduces an original software engineering methodology we developed while focusing on the implementation of a low-level image processing library targeted for a shared memory multi-processor DSP architecture: the TMS320C80. Real-time constraints led us to concentrate on the enhancement of data locality thanks to the software managing of caches… (More)

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Cite this paper

@inproceedings{LohierASE, title={A Software Engineering Methodology to Optimize Caching in Multi-processor DSP Architectures: TMS320C80 Results towards the Real-time Execution of Low Level Image Processing}, author={Frantz Lohier and Patrick Garda} }