A Signature-Based Power Model for MPSoC on FPGA

  title={A Signature-Based Power Model for MPSoC on FPGA},
  author={Roberta Piscitelli and Andy D. Pimentel},
  journal={VLSI Design},
This paper presents a framework for high-level power estimation of multiprocessor systems-on-chip (MPSoC) architectures on FPGA. The technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set simulator (ISS)-based power estimation methods and should thus be capable of achieving good evaluation performance. As a consequence, the technique can be very useful in the context of early… CONTINUE READING


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Using abstract power estimation models for design space exploration in NoCbased MPSoC

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