A SRAM Memory Cell Design in FPGA

@inproceedings{Vivekanandan2013ASM,
  title={A SRAM Memory Cell Design in FPGA},
  author={C. Vivekanandan},
  year={2013}
}
The main objective of this work is to design a memory cell in Field Programmable Gate Array (FPGA) that consumes lesser power with reduced delay constraint. In the existing system, the FPGA is based on 10T Static Random Access Memory (SRAM) cell configuration in which power consumption is relatively high. The proposed work includes a Self controllable… CONTINUE READING