• Corpus ID: 212471371

A Review on Pipelined integer DCT architecture for HEVC

@inproceedings{Bendale2016ARO,
  title={A Review on Pipelined integer DCT architecture for HEVC},
  author={Mr. Rahul R. Bendale},
  year={2016}
}

• Mr. Rahul R. Bendale
• Published 2016
• Computer Science

Currently different types of transform techniques are used by different video codecs to achieve data compression during video frame transmission. Among them, Discrete cosine transform (DCT) is supported by most of modern video standards. The integer DCT is an approximation of DCT. It can be implemented exclusively with integer arithmetic. Integer DCT proves to be highly advantageous in cost and speed for hardware implementation. Implementation of an efficient discrete cosine transform with reduced complexity and number of multiplications. Pipelining technique is introduced to reduce the processing time. The full pipeline variable block size transform engine with the efficient hardware utilization is proposed to handle the DCT/IDCT.2D-DCT is computed by combing two 1D-DCT that connected by a transpose buffer. Keywords— Discrete cosine transform (DCT),HEVC,I-DCT,FPGA,VHDL,Video compression INTRODUCTION H.265/High Efficiency Video Coding (HEVC) is the successor codec to H.264,which, like H.264, is jointly developed by the ISO/IEC Moving Picture Experts Group and ITU-T Video Coding Experts Group (VCEG)To maximize compression capability and improve other characteristics such as data loss robustness, while considering the computational resources that were practical for use in products at the time of anticipated deployment of each standard. It is widely used for many applications, including broadcast of high definition (HD) TV signals over satellite, cable, and terrestrial transmission systems, video content acquisition and editing systems, camcorders, security applications, Internet and mobile network video, Blu-ray Discs, and real-time conversational applications such as video chat and video conferencing. However, an increasing diversity of services, the growing popularity of HD video, and the emergence of beyond-HD formats (e.g., 4k×2k or 8k×4k resolution) are creating even stronger needs for coding efficiency. Moreover, the traffic caused by video applications targeting mobile devices and tablet PCs, as well as the transmission needs for video-on-demand services, are imposing severe challenges on today’s networks. An increased desire for higher quality and resolutions is also arising in mobile applications. HEVC has been designed to address essentially all existing applications of H.264/MPEG-4 AVC and to particularly focus on two key issues: increased video resolution and increased use of parallel processing architectures. The 2D-DCT is computationally intensive and as such there is a great demand for high speed, high throughput and short latency computing architectures. Due to the high computation requirements, the 2D-DCT processor design has been concentrated on small non overlapping blocks (typical 8x8). Many 2D-DCT algorithms have been proposed to achieve reduction of computational complexity and thus increase the operational speed and throughput. The various algorithms and architectures for the 2D-DCT can be divided into two categories: The row-column decomposition methods and the non-row-column decomposition methods