Corpus ID: 212471371

A Review on Pipelined integer DCT architecture for HEVC

@inproceedings{Bendale2016ARO,
  title={A Review on Pipelined integer DCT architecture for HEVC},
  author={Mr. Rahul R. Bendale},
  year={2016}
}
  • Mr. Rahul R. Bendale
  • Published 2016
  • Currently different types of transform techniques are used by different video codecs to achieve data compression during video frame transmission. Among them, Discrete cosine transform (DCT) is supported by most of modern video standards. The integer DCT is an approximation of DCT. It can be implemented exclusively with integer arithmetic. Integer DCT proves to be highly advantageous in cost and speed for hardware implementation. Implementation of an efficient discrete cosine transform with… CONTINUE READING

    References

    SHOWING 1-9 OF 9 REFERENCES
    Efficient hardware architecture for direct 2D DCT computation and its FPGA implementation
    • 3
    Efficient Hardware Architecture of a Modified 2-D Transform for the HEVC Standard
    • 4
    Overview of the High Efficiency Video Coding (HEVC) Standard
    • 5,242
    • PDF
    Belkouch -Efficient hardware architecture for direct 2D DCT computation and its FPGA Implementation‖
    • 2013
    2 Dr.S Ravi,3 V.Jayapradha 1SCSVMV University 2 Dr
    • MGR University
    3Manoj Sharma1 -Trends in Video Compression Technologies and Detailed Performance Comparison of H.264/MPEG-AVC and H.265/MPEGHEVC‖, Bharati Vidyapeeth"s College of Engineering
    • International Journal of Engineering Research & Technology (IJERT)
    Nouri Masmoudi3 -Efficient Hardware Architecture of a Modified 2-D Transform for the HEVC Standard‖ University of Sfax
    • Fatma Belghith*1, Hassen Loukil2