Corpus ID: 212484035

A Review of Various Trends of Digital-To-Analog Converter with Performance Characteristics and Behavioral Parameters

@inproceedings{Kherde2013ARO,
  title={A Review of Various Trends of Digital-To-Analog Converter with Performance Characteristics and Behavioral Parameters},
  author={Anuradha S. Kherde and P. R. Gumble},
  year={2013}
}
The CMOS technology which is really shrinking day by day which favors digital circuitry but it is challenge to the analog designer as there are some limitations such as process gradients and random device variations. Digital-to-analog converters (DAC’s) are one of the essential class of analog blocks facing high performance demand and DACs are so closely tied to digital circuitry that they are likely to be included in an ASSP or a SoC. Digital-to-analog converters (DACs) Comprises voltage or… Expand

Figures from this paper

R-2R ladder circuit design for 32-bit digital-to-analog converter (DAC) with noise analysis and performance parameters
  • Sunil S. Parmar, A. Gharge
  • Computer Science
  • 2016 International Conference on Communication and Signal Processing (ICCSP)
  • 2016
TLDR
A simple way to design a DAC with register networks (R-2R) is presented and compensation of DNL and INL nonlinearities are possible somehow even though static distortions are the most often in high end ladder network digital to analog converter. Expand
Design Of DAC Using Binary-Controlled Pass-Transistors And A Voltage Summer
In this work, general design architecture for n-bit digital to analog converter (DAC) using binary-controlled analog multiplexers and voltage summer is introduced. Then a circuit level design forExpand
Design and Simulation of a Sine Wave Inverter with PID Control for Nonlinear Load Applications
DC to AC Converters generate discrete output wave forms. Mostly, neither the voltage nor the current have the desired wave forms and also produce harmonic, power losses and high frequency noise. TheExpand
A 8-Bit Hybrid Architecture Current-Steering DAC
1 Student, Electronics and communication, N.M.A.M. Institute of Technology, Karnataka, India 2 Professor, Electronics and communication, N.M.A.M. Institute of Technology, , Karnataka, India 3Expand

References

SHOWING 1-10 OF 11 REFERENCES
A 6-bit Fully Binary Digital-to-Analog Converter in 0.25-$\mu{\hbox {m}}$ SiGe BiCMOS for Optical Communications
This paper presents an approach to implement a high-speed binary weighted digital-to-analog converter (DAC). A different current switching mechanism is proposed that improves the dynamic performanceExpand
A Heterogeneous 16-Bit DAC Using a Replica Compensation
  • Dongwon Seo
  • Engineering, Computer Science
  • IEEE Transactions on Circuits and Systems I: Regular Papers
  • 2008
A highly monotonic very low power 16-bit 2-MS/s digital-to-analog converter (DAC) for high-resolution control loop systems is proposed and demonstrated. Replica compensation is used in improving theExpand
A 12-Bit 1-Gsample/s Nyquist Current-Steering DAC in 0.35 µm CMOS for Wireless Transmitter
The present work deals with 12-bit Nyquist current-steering CMOS digital-to-analog converter (DAC) which is an essential part in baseband section of wireless transmitter circuits. Using oversamplingExpand
Current-Steering Digital-to-Analog Converters: Functional Specifications, Design Basics, and Behavioral Modeling
TLDR
A generalized design flow for DACs and design basics for current-steering architectures, together with a universal SIMULINK®-based behavioral model useful for the block-level simulation of a current- Steering DAC, are described. Expand
A Compact Dynamic-Performance-Improved Current-Steering DAC With Random Rotation-Based Binary-Weighted Selection
  • Wei-Te Lin, T. Kuo
  • Engineering, Computer Science
  • IEEE Journal of Solid-State Circuits
  • 2012
TLDR
The proposed random rotation-based binary-weighted selection (RRBS) that efficiently performs dynamic-element matching (DEM) by randomly rotating the sequence of these units to form new binary- Weighted current groups for each DAC output is proposed. Expand
A low-power MPEG audio layer III decoder IC with an integrated digital-to-analog converter
An MP3 decoder IC including a stereo DAC suitable for portable players is presented. The DAC uses digital interpolation to operate on a fixed output sample rate. The 28.5 mm/sup 2/ IC consumes 40-50Expand
Digital-to-AnalogConverters: Functional Specifications,Design Basics, and Behavioral Modeling ,IEEE
  • Antennas and Propagation Magazine,
  • 2010
A Low-Voltage 10-Bit CMOS DAC in 0.01-mm2 Die Area
  • IEEE Transactions on Circuit and Systems—II: Express Briefs ,
  • 2005
Design of a 10 Bit TSMC 0.25μm CMOS Digital to Analog Converter
  • IEEE
  • 2005
Design of a 10 Bit TSMC 0.25μm CMOS Digital to Analog Converter,IEEE
  • 2005
...
1
2
...