A Resource-Efficient Communication Architecture for Chip Multiprocessors on FPGAs

@article{Wang2011ARC,
  title={A Resource-Efficient Communication Architecture for Chip Multiprocessors on FPGAs},
  author={Xiaofang Wang and Swetha Thota},
  journal={Journal of Computer Science and Technology},
  year={2011},
  volume={26},
  pages={434-447}
}
Significant advances in field-programmable gate arrays (FPGAs) have made it viable to explore innovative multiprocessor solutions on a single FPGA chip. For multiprocessors, an efficient communication network that matches the needs of the target application is always critical to the overall performance. Wormhole packet-switching network-on-chip (NoC) solutions are replacing conventional shared buses to deal with scalability and complexity challenges coming along with the increasing number of… CONTINUE READING

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