A Resonant Global Clock Distribution for the Cell Broadband-Engine Processor


Resonant clock distributions have the potential to save power by recycling energy from cycle-to-cycle while at the same time improving performance by reducing the clock distribution latency and filtering out non-periodic noise. While these features have been successfully demonstrated in several small-scale experiments, there remained a number of concerns about whether these techniques would scale to a product application. By modifying the Cell Broadband Engine Processor to incorporate a large resonant global clock network, power savings with full functionality is demonstrated over a 20% range in clock frequencies, and a 6–8 Watt power savings at 4 GHz. This was achieved by changing one wiring level and adding an additional thick copper level to create inductors and capacitors.

DOI: 10.1109/ISSCC.2008.4523282

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@inproceedings{Chan2008ARG, title={A Resonant Global Clock Distribution for the Cell Broadband-Engine Processor}, author={Steven C. Chan and Phillip Restle and Thomas J. Bucelot and Steve Weitzel and John M. Keaty and John S. Liberty and Brian K. Flachs and Richard Volant and Peter Kapusta and Jeffrey S. Zimmerman}, booktitle={ISSCC}, year={2008} }