A Reentrant Delay-line Memory Using a YBa2Cu3O7-d Coplanar Delay-line

Abstract

The rapid growth in telecommunication traffic demands a higher-speed asynchronous transfer mode (ATM) switching system. At present, the upper limit of the system clock rate is determined by the maximum clock rate of conventional semiconductor memory devices, such as the register files used in ATM cell buffer storage. This is because the maximum clock rate… (More)

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4 Figures and Tables