A QPLL-timed direct-RF sampling band-pass ΣΔ ADC with a 1.2 GHz tuning range in 0.13 µm CMOS

@article{Gupta2011AQD,
  title={A QPLL-timed direct-RF sampling band-pass ΣΔ ADC with a 1.2 GHz tuning range in 0.13 µm CMOS},
  author={Subhanshu Gupta and Daibashish Gangopadhyay and Hasnain Lakdawala and Jacques C. Rudell and David J. Allstot},
  journal={2011 IEEE Radio Frequency Integrated Circuits Symposium},
  year={2011},
  pages={1-4}
}
A direct-RF sampled band-pass ΣΔ modulator enables reconfigurable RF A/D conversion. It features a programmable narrow-band Q-enhanced low-noise amplifier and a phase-locked loop implemented using a low-phase-noise injection-locked harmonic-filtering quadrature voltage-controlled oscillator. The quadrature outputs of the PLL provide phase synchronization between a raised-cosine DAC and the quantizer. The three-tap raised-cosine finite-impulse response filter is embedded in the RF DAC. A… CONTINUE READING