A Proposed Design of Five Transistor CMOS SRAM Cell for High Speed Applications

Abstract

Static random access memories (SRAMs) is made up of very large scale integrated (VLSI) circuits. A SRAM cell to operate in the deep submicron ranges it should meet some stringent requirements . This paper presents a new five transistor (5T) CMOS SRAM cell to accomplish improvements in stability, power dissipation, and performance over previous designs, for… (More)

Topics

4 Figures and Tables