A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform

@article{Chen2001APP,
  title={A Programmable Parallel VLSI Architecture for 2-D Discrete Wavelet Transform},
  author={Chien-Yu Chen and Zhong-Lan Yang and Tu-Chih Wang and Liang-Gee Chen},
  journal={VLSI Signal Processing},
  year={2001},
  volume={28},
  pages={151-163}
}
Many VLSI architectures for computing the discrete wavelet transform (DWT) were presented, but the parallel input data sequence and the programmability of the 2-D DWT were rarely mentioned. In this paper, we present a parallel-processing VLSI architecture to compute the programmable 2-D DWT, including various wavelet filter lengths and various wavelet transform levels. The proposed architecture is very regular and easy for extension. To eliminate high frequency components, the pixel values… CONTINUE READING