A Petri Net Model for Evaluating Packet Buffering Strategies in a Network Processor

Abstract

Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri net model of IP forwarding application on IXP2400 that models the different levels of the memory hierarchy. The cell based interface used to receive and transmit packets in a… (More)
DOI: 10.1109/QEST.2007.29

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