Corpus ID: 212456506

# A Performance Comparison of Current Starved VCO and Source Coupled VCO for PLL in 0 . 18 μ m CMOS Process

@inproceedings{Patil2012APC,
title={A Performance Comparison of Current Starved VCO and Source Coupled VCO for PLL in 0 . 18 $\mu$ m CMOS Process},
author={Rashmi K Patil and Vrushali G. Nasre},
year={2012}
}
• Published 2012
48 Abstract— This paper describes a performance comparison of two Voltage Controlled Oscillator for Phase Locked Loop. Current Starved VCO and Source Coupled VCO for PLLs in a 0.18 μm digital CMOS process are designed and their performances are compared based on the measurement results. The design is implemented in Tanner environment with high oscillation frequency, low power consumption, and low area. Design procedures and simulation results are illustrated. Measured performances shows that… Expand
24 Citations

#### Figures and Tables from this paper

Design of 4.9 GHz Current starved VCO for PLL and CDR
• Physics
• 2018 5th International Conference on Signal Processing and Integrated Networks (SPIN)
• 2018
A modified current starved voltage controlled oscillator (VCO) is introduced that uses voltage to current convertor based biasing circuit. The voltage supply fluctuations are reduced at output ofExpand
A low power low noise current starved CMOS VCO for PLL
• Computer Science
• International Conference on Computing, Communication & Automation
• 2015
An ultra low power, low phase noise current starved CMOS VCO is proposed and performed using cadence virtuoso gpdk045 nm CMOS technology and demonstrates the superlative performance of the CSVCO. Expand
A Linear Current Starved Voltage Controlled Ring Oscillator With Wide Tuning Range Using 180nm CMOS Technology
• Materials Science
• 2018 International Conference on Recent Innovations in Electrical, Electronics & Communication Engineering (ICRIEECE)
• 2018
This paper presents the evaluation and performance analysis of 5 stage Current Starved Voltage Controlled ring Oscillator (CSVCO) which employ the method of linearization technique. In thisExpand
Performance analysis of oscillating frequency of a source coupled VCO at 32nm regime
• Physics
• 2016 International Conference on Automatic Control and Dynamic Optimization Techniques (ICACDOT)
• 2016
The VCO (voltage controlled oscillator) is the main part of PLL (Phase locked loop), frequency synthesizes, generally used in recent electronics systems. The ring oscillator with multiple stagesExpand
Low Power Five Stage Current Starved Voltage Controlled Oscillator in 0 . 18 μ m CMOS Technology towards Green Electronics
• 2015
This paper presents a five stage current starved Voltage Controlled Oscillator (CMOS VCO) for low power Phase Lock Loop (PLL). The implemented design used a standard 0.18μm CMOS Technology withExpand
Performance Analysis of Low Power CSVCO for PLL Architecture
• Computer Science
• 2015 Second International Conference on Advances in Computing and Communication Engineering
• 2015
The performance analysis of an ultra low power, low phase noise current starved CMOS VCO for PLL architecture is described and after simulation the phase noise at 1MHz is-104.0dBc/Hz. Expand
Design and analysis of a single-stage source coupled complementary metal oxide semiconductor voltage control oscillator using 45 nm technology
• Engineering
• 2013
This paper deals with the design and performance analysis of a single-stage source coupled complementary metal oxide semiconductor voltage controlled oscillator (VCO). VCO is a crucial component inExpand
A Performance Comparision of OTA BasedVCO and Telescopic OTA Based VCO forPLL in 0.18um CMOS Process
This paper describes a performance comparison of two Voltage Controlled Oscillator for Phase Locked Loop designed and compared and measured performances shows that jitter and power consumption in Telescopic OTA Based VCO is reduced as compared to OTA based VCO with wide frequency range. Expand
Design and analysis of 3 stage ring oscillator based on MOS capacitance for wireless applications
• Engineering
• 2017 International Conference on Electrical, Computer and Communication Engineering (ECCE)
• 2017
This paper comprises the study and performance analysis of switched capacitor ring voltage controlled oscillator (VCO) which uses the method of controlling capacitance to regulate oscillationExpand
Design of 2.4 GHz CMOS LC Tank Voltage Controlled Oscillator (VCO) for PLL using 0.18 µm CMOS Technology
• Materials Science
• 2018 IEEE International Conference on Semiconductor Electronics (ICSE)
• 2018
This paper presents the design of a 2.4 GHz LC Voltage Controlled Oscillator implemented using 0.18 µm CMOS technology. The LC VCO achieves a simulated phase noise of −97.76 dBc/Hz at 1MHz of offsetExpand

#### References

SHOWING 1-10 OF 12 REFERENCES
A Full Swing And Low Power Voltage-Controlled Ring Oscillator
• Engineering
• 2005 IEEE Conference on Electron Devices and Solid-State Circuits
• 2005
This paper presents a full swing and low power Voltage Controlled Ring Oscillator fabricated in a 0.35um CMOS technology. The VCO delay cell utilizes a nmos delay pair to save the power dissipationExpand
A low power and high speed CMOS Voltage-Controlled Ring Oscillator
• Materials Science, Computer Science
• 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
• 2004
The proposed VCO uses partial positive feedback in its delay cell, allowing the circuit to operate with single two stages, achieving high speed with reduced power consumption. Expand
Design of a 1GHz Digital PLL Using 0.18\mu m CMOS Technology
• Computer Science
• Third International Conference on Information Technology: New Generations (ITNG'06)
• 2006
A digital phase-locked loop (DPLL) is designed and is shown to have 1GHz operation with lock time of 643.36ns and there was a trade-off between the lock time, loop filter capacitor, and ripples on the output of the VCO. Expand
A 900-MHz CMOS low-phase-noise voltage-controlled ring oscillator
• Materials Science
• 2001
A 900-MHz two-stage CMOS voltage-controlled ring oscillator (VCO) with good phase-noise performance is presented. Implemented in a 0.5-/spl mu/m CMOS technology and at 2.5-V supply voltage, the VCOExpand
A low phase noise 2.0 V 900 MHz CMOS voltage controlled ring oscillator
• Materials Science, Computer Science
• 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
• 2004
A CMOS voltage controlled ring oscillator with quadrature output is presented, designed in a 0.18 /spl mu/m CMOS process and operates on a 2.0 V supply. Expand
Analysis of timing jitter in CMOS ring oscillators
• Physics, Computer Science
• Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94
• 1994
in this paper the effects of thermal noise in transistors on timing jitter in CMOS ring-oscillators composed of source-coupled differential resistively-loaded delay cells is investigated. TheExpand
CMOS Circuit Design, Layout, and Simulation
Regardless of one's integrated circuit (IC) design skill level, this book allows readers to experience both the theory behind, and the hands-on implementation of, complementary metal oxide semiconductor (CMOS) IC design via detailed derivations, discussions, and hundreds of design, layout, and simulation examples. Expand
A low power and high speed CMOS Voltage-Controlled Ring Oscillator, Circuits and Systems
• International Symposium on