A PVT insensitive BCT circuit with replica calibration for high speed charge-domain pipelined ADCs

Abstract

A boosted charge transfer (BCT) circuit with replica calibration for high-speed charge domain (CD) pipelined analog to digital converters (ADCs) is presented in this paper. The common-mode charge errors caused by PVT variations can be rejected by the negative feedback network inside the replica circuit of the BCT. A 250-MSPS, 10bit CD pipelined ADC based on… (More)

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@article{Zhu2012API, title={A PVT insensitive BCT circuit with replica calibration for high speed charge-domain pipelined ADCs}, author={Shuang Zhu and Hong Zhang and Xue Li and Dong Li and Zhenhai Chen and Jun Cheng}, journal={2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology}, year={2012}, pages={1-3} }