A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs

@inproceedings{Benkrid2003ANF,
  title={A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs},
  author={Abdsamad Benkrid and Khaled Benkrid and Danny Crookes},
  booktitle={FCCM},
  year={2003}
}
FIR filters are often used in digital signal processing. This paper presents a novel architecture for FIR filters on Xilinx Virtex FPGAs. The architecture is particularly useful for handling the problem of signal boundaries filtering, which occurs in finite length signal processing (e.g. image processing). Based on a bit parallel arithmetic, our architecture is fully scalable and parameterised. It cleverly exploits the Shift Register Logic (SRL16) component of the Virtex family. The… CONTINUE READING