A Novel Address Mapping Scheduling Strategy for Continuous Flow Parallel FFT Implementation - Semantic Scholar

Abstract

The paper proposes a new continuous flow parallel Fast Fourier Transform (FFT)processor using a novel address mapping scheduling strategy and two costefficient non-conflict address mapping approaches. Four parallel butterfly computation units enhance the high throughput. The novel address mapping scheduling strategy uses only two memory units for a… (More)

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Cited By

A Methodology for Speeding Up Fast Fourier Transform Focusing on Memory Architecture Utilization

Vasilios I. Kelefouras, George Athanasiou, Nikolaos Alachiotis, Harris E. Michail, Angeliki Kritikakou, Constantinos E. Goutis
IEEE Transactions on Signal Processing
2011

References

Showing 1-6 of 6 references

Chu Chao, Zhang Qin, Xie Yingke, Han Chengde
2005

Design and implementation of a parallel real-time FFT processor

Shiqun Zhang, Dunshan Yu
Proceedings. 7th International Conference on…
2004

H Sung C, B Lee K, W. Jen C
ASIA-Pacific Conference on ASICs,
2002

L.Jia, Y.Gao, H. Tenhunen
Proc. IEEE 42nd Midwest Symp. Circuits Syst.,1999…
1999

Design and Implementation of a 1024-point Pipeline FFT Processor

Shousheng He, Mats Torkelson
1998

L. G. Johnson
IEEE Tram. Circuits S,wt. 11,.vol.39,pp
1992

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