A Multiplexer-Based Concept for Reconfigurable Multiplier Arrays

@inproceedings{Pfnder2004AMC,
  title={A Multiplexer-Based Concept for Reconfigurable Multiplier Arrays},
  author={Oliver A. Pf{\"a}nder and Roland Hacker and Hans-J{\"o}rg Pfleiderer},
  booktitle={FPL},
  year={2004}
}
Background • In modern digital systems, the component responsible for handling arithmetic operations is known as the Arithmetic Logic Unit (ALU) • These lie in the critical data path of the core data processing elements – CPU, DSP, and ASIC/FPGA processing and addressing ICs • Performance of the system, in regards to numerical applications is directly related to the structure and design of the ALU which performs: • addition/subtraction • multiplication • shift/extension • exponentiation • many… CONTINUE READING
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