A Memory-based Architecture for MPEG2 System Protocol LSIs

Abstract

This paper proposes a memory-based architecture implementing the MPEG2 System protocol LSIs, and demonstrates its flexibility and performance. The memory-based architecture implements the full functionality of the MPEG2 System protocol for both multiplexing and de-multiplexing MPEG2-encoded streams. It consists of a core CPU, memories, and dedicated application-specific hardware. It is designed and optimized by hardware/software co-design techniques. The LSIs provide sufficient performance and flexibility for real-time applications of the MPEG2 System protocol.

DOI: 10.1109/EDTC.1996.494347

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@article{Inamori1996AMA, title={A Memory-based Architecture for MPEG2 System Protocol LSIs}, author={Minoru Inamori and Jiro Naganuma and Haruo Wakabayashi and Makoto Endo}, journal={IEEE Trans. VLSI Syst.}, year={1996}, volume={7}, pages={339-344} }