A Low Power Sinc3 Filter for ΣΔ Modulators
@article{Lombardi2007ALP, title={A Low Power Sinc3 Filter for ΣΔ Modulators}, author={A. Lombardi and E. Bonizzoni and P. Malcovati and F. Maloberti}, journal={2007 IEEE International Symposium on Circuits and Systems}, year={2007}, pages={4008-4011} }
In recent years, continuous research efforts have been concentrating in increasing ΣΔ modulators operating frequency, while still reducing their power consumption. Indeed, when the ΣΔ modulator figure of merit (FoM) is less than 1 pJ/conversion, the decimation filter power consumption becomes a critical parameter. This paper presents a low power sin3 FIR filter for ΣΔ modulators. The proposed filter implements a decimation by 4, operating at 64 MHz and consumes only 0.1 pJ/sample processed. The… CONTINUE READING
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References
SHOWING 1-7 OF 7 REFERENCES
A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter
- Computer Science
- 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
- 2004
- 14
A 13-bit, 2.2-MS/s, 55-mW multibit cascade /spl Sigma//spl Delta/ modulator in CMOS 0.7-/spl mu/m single-poly technology
- Engineering
- 1999
- 56
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology
- Physics
- 1999
- 47
Rodriguerez-Vazquez, “A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ Modulator in CMOS 0.7-μW single-poly technology
- IEEE Journal of Solid-State Circuit,
- 1999
Principles of CMOS VLSI Design, A System Perspective
- Principles of CMOS VLSI Design, A System Perspective
- 1994