A Low Power Sinc3 Filter for ΣΔ Modulators

  title={A Low Power Sinc3 Filter for $\Sigma$$\Delta$ Modulators},
  author={Andrea Lombardi and Edoardo Bonizzoni and Piero Malcovati and Franco Maloberti},
  journal={2007 IEEE International Symposium on Circuits and Systems},
In recent years, continuous research efforts have been concentrating in increasing ΣΔ modulators operating frequency, while still reducing their power consumption. Indeed, when the ΣΔ modulator figure of merit (FoM) is less than 1 pJ/conversion, the decimation filter power consumption becomes a critical parameter. This paper presents a low power sin3 FIR filter for ΣΔ modulators. The proposed filter implements a decimation by 4, operating at 64 MHz and consumes only 0.1 pJ/sample processed. The… 
An optimized two stages low power sinc3 filter for ΣΔ modulators
This paper presents the design of a low power sinc3 filter implementing a decimation factor by 16 and suitable for a second order SigmaDelta modulators running at 256 MHz. The circuit uses the
A low power, low chip area decimation filter for Σ - Δ modulator for flywheel MEMS gyro realized in the CMOS 180 nm technology
The paper presents a low power and low chip area decimation filter for a 15-bits Σ-Δ analog-to-digital converter (ADC) designed for a flywheel MEMS gyroscope. In contrary to typical solutions, in
A Polyphase comb filter using interlaying multiplexers for high-speed single-bit Sigma-Delta modulators
This paper proposes a new design for a Polyphase implementation of a third-order SINC filter (SINC3) with a decimation factor of 8. In order to make our solution more power efficient in comparison
Digital Sigma-Delta Modulator with High SNR (100dB+)
Since the onset of processing cores that the conversion from digital to analog and analog to digital has proved very important. The vast majority of the processing today is done on a digital level,
Applications research of sigma-delta modulator in high precision measurement system of motor current
The research proposes a Sigma-Delta AD conversion design for AC motor current measurement system, and the Sinc3 digital decimation filter is adopted to demodulate and filter the AD conversion signal, and meets the requirements of sampling accuracy and response speed of AC motorCurrent measurement.
FPGA Realization of Multi Channel Data Acquisition System using Softcore Embedded Processor
To avoid threats from underwater Mines and Torpedoes a naval ship must produce very low acoustic and magnetic signatures. Most of these signatures are at very low frequencies; this makes designing


A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter
  • A. Gerosa, A. Neviani
  • Computer Science
    2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)
  • 2004
This work proposes a digital sinc filter based on the direct implementation of the convolution relationship between the input samples and the filter coefficients that implies less hardware complexity that translates in power and area savings.
A 13-bit, 2.2-MS/s, 55-mW multibit cascade /spl Sigma//spl Delta/ modulator in CMOS 0.7-/spl mu/m single-poly technology
This paper presents a CMOS 0.7-/spl mu/m /spl Sigma//spl Delta/ modulator IC that achieves 13-bit dynamic range at 2.2 MS/s with an oversampling ratio of 16. It uses fully differential
Delta-sigma data converters : theory, design, and simulation
This comprehensive guide offers a detailed treatment of the analysis, design, simulation and testing of the full range of today's leading delta-sigma data converters. Written by professionals
Architectures for digital signal processing
This book fuses signal processing algorithms and VLSI circuit design to assist digital signal processing architecture developers and shows how this technique can be used in applications such as: signal transmission and storage, manufacturing process quality control and assurance, autonomous mobile system control and biomedical process analysis.
Rodriguerez-Vazquez, “A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ Modulator in CMOS 0.7-μW single-poly technology
  • IEEE Journal of Solid-State Circuit,
  • 1999
Principles of CMOS VLSI Design, A System Perspective
  • Principles of CMOS VLSI Design, A System Perspective
  • 1994