A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA Full-Scale Stimulation

@article{Sit2007ALB,
  title={A Low-Power Blocking-Capacitor-Free Charge-Balanced Electrode-Stimulator Chip With Less Than 6 nA DC Error for 1-mA Full-Scale Stimulation},
  author={Ji-Jon Sit and Rahul Sarpeshkar},
  journal={IEEE Transactions on Biomedical Circuits and Systems},
  year={2007},
  volume={1},
  pages={172-183}
}
Large dc blocking capacitors are a bottleneck in reducing the size and cost of neural implants. We describe an electrode-stimulator chip that removes the need for large dc blocking capacitors in neural implants by achieving precise charge-balanced stimulation with <6 nA of dc error. For cochlear implant patients, this is well below the industry's safety limit of 25 nA. Charge balance is achieved by dynamic current balancing to reduce the mismatch between the positive and negative phases of… CONTINUE READING
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