A Low-Latency and Low-Power Hybrid Scheme for On-Chip Networks


Network-on-chip (NoC) has emerged as a vital factor that determines the performance and power consumption of many-core systems. This paper proposes a hybrid scheme for NoCs, which aims at obtaining low latency and low power consumption. In the presented hybrid scheme, a novel switching mechanism, called virtual circuit switching, is proposed to intermingle… (More)
DOI: 10.1109/TVLSI.2014.2318374


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