A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time

Abstract

A portable clock generator, which solves the duty ratio and jitter problems of the input clock, has been developed. In the proposed clock generator, the complementary delay line generates a series of multiphase clocks. The 0-to-1 transition detector finds the 2 pi phase delayed position among the multiphase clocks produced by the complementary delay line… (More)
DOI: 10.1109/TVLSI.2008.2004591

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