A Low-Area, 0.18μm CMOS, 10Gb/s Optical Receiver Analog Front End

@article{Maadani2007AL0,
  title={A Low-Area, 0.18μm CMOS, 10Gb/s Optical Receiver Analog Front End},
  author={Mohsen Maadani and Seyed Mojtaba Atarodi},
  journal={2007 IEEE International Symposium on Circuits and Systems},
  year={2007},
  pages={3904-3907}
}
A fully integrated, low-cost (area), low-power, high-gain, differential optical receiver analog front-end (AFE), including transimpedance amplifier (TIA), limiting amplifier (LA), DC-offset cancellation feedback and output-buffer is designed in TSMC 0.18μm CMOS technology. The optimized TIA has a regulated cascode (RGC) topology, with 5.9mW power-dissipation, 48 dBΩ gain, 8.46GHz bandwidth. The proposed limiting amplifier (LA) has an inductor-less topology, with 41.9dB gain, 91.1mW power… CONTINUE READING
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