A Linear Uplink WCDMA Modulator with 156dBc/Hz Downlink SNR

@article{Papadopoulos2007ALU,
  title={A Linear Uplink WCDMA Modulator with 156dBc/Hz Downlink SNR},
  author={Dimitris Papadopoulos and Qiuting Huang},
  journal={2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers},
  year={2007},
  pages={338-607}
}
A linearity-boosting technique for upconversion mixers enables a 0.13mum CMOS WCDMA modulator to achieve -49dBc ACLR and -l56dBc/Hz SNR. The chip consumes 113mW from a 1.2V supply. It is suitable for SAW-filter-free TX implementations. Results show that this technique improves the mixer IIP3 by 6dB 

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