A Layered Real - Time Speci cation of a


This paper gives an overview of the real-time speciication of a commercial RISC processor. The speciication is at two related levels, with an abstraction relation deened between them. The lower level speciication models separate stages of execution of up to ve overlapped instructions. The higher level speciication abstracts from the lower level to recapture… (More)


Cite this paper

@inproceedings{Kearney1994ALR, title={A Layered Real - Time Speci cation of a}, author={Peter Kearney and Mark Utting}, year={1994} }