A LUT-Based Approximate Adder

Abstract

In this paper, we propose a novel approximate adder structure for LUT-based FPGA technology. Compared with a full featured accurate carry-ripple adder, the longest path is significantly shortened which enables the clocking with an increased clock frequency. By using the proposed adder structure, the throughput of an FPGA-based implementation can be… (More)
DOI: 10.1109/FCCM.2016.16

Topics

1 Figure or Table

Slides referencing similar topics