A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores


Increasing vulnerability of transistors and interconnects due to scaling is continuously challenging the reliability of future microprocessors. Lifetime reliability is gaining attention over performance as a design factor even for lower-end commodity applications. In this work we present a low-power hybrid fault tolerant architecture for reliability… (More)
DOI: 10.1007/s10836-016-5578-0

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