A Highly Parallel and Energy Efficient Three-Dimensional Multilayer CMOS-RRAM Accelerator for Tensorized Neural Network

@article{Huang2018AHP,
  title={A Highly Parallel and Energy Efficient Three-Dimensional Multilayer CMOS-RRAM Accelerator for Tensorized Neural Network},
  author={Hantao Huang and Leibin Ni and Kaixuan Wang and Yuangang Wang and Hao Yu},
  journal={IEEE Transactions on Nanotechnology},
  year={2018},
  volume={17},
  pages={645-656}
}
It is a grand challenge to develop highly parallel yet energy-efficient machine learning hardware accelerator. This paper introduces a three-dimensional (3-D) multilayer CMOS-RRAM accelerator for a tensorized neural network. Highly parallel matrix–vector multiplication can be performed with low power in the proposed 3-D multilayer CMOS-RRAM accelerator. The adoption of tensorization can significantly compress the weight matrix of a neural network using much fewer parameters. Simulation results… CONTINUE READING