A High-Voltage Characterisation Platform For Emerging Resistive Switching Technologies

@article{Shen2022AHC,
  title={A High-Voltage Characterisation Platform For Emerging Resistive Switching Technologies},
  author={Jiawei Shen and Andrea Mifsud and Lijie Xie and Abdulaziz Alshaya and Christos Papavassiliou},
  journal={ArXiv},
  year={2022},
  volume={abs/2205.08391}
}
—Emerging memristor-based array architectures have been effectively employed in non-volatile memories and neuromorphic computing systems due to their density, scalability and capability of storing information. Nonetheless, to demonstrate a practical on-chip memristor-based system, it is essential to have the ability to apply large programming voltage ranges during the characterisation procedures for various memristor technologies. This work presents a 16x16 high voltage memristor… 

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References

SHOWING 1-10 OF 17 REFERENCES

A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations

TLDR
A programmable neuromorphic computing chip based on passive memristor crossbar arrays integrated with analogue and digital components and an on-chip processor enables the implementation of neuromorphic and machine learning algorithms.

The future of electronics based on memristive systems

TLDR
The state of the art in memristor-based electronics is evaluated and the future development of such devices in on-chip memory, biologically inspired computing and general-purpose in-memory computing is explored.

A Drift-Tolerant Read/Write Scheme for Multilevel Memristor Memory

TLDR
A memristor crossbar memory architecture that utilizes a reduced constraint read-monitored-write scheme and utilizes reduced hardware, aiming to decrease the feedback complexity and latency while still operating with CMOS compatible voltages is presented.

Image Processing by a Programmable Grid Comprising Quantum Dots and Memristors

TLDR
An analog programmable memristive grid-based architecture capable of performing various real-time image processing tasks such as edge and line detections is presented and a method to program Memristive connections is introduced and verified through circuit simulations.

The mechanism of electroforming of metal oxide memristive switches.

TLDR
The nature of the oxide electroforming as an electro-reduction and vacancy creation process caused by high electric fields and enhanced by electrical Joule heating is explained with direct experimental evidence.

Nanoscale memristor device as synapse in neuromorphic systems.

TLDR
A nanoscale silicon-based memristor device is experimentally demonstrated and it is shown that a hybrid system composed of complementary metal-oxide semiconductor neurons and Memristor synapses can support important synaptic functions such as spike timing dependent plasticity.

Memristor-Based Material Implication (IMPLY) Logic: Design Principles and Methodologies

TLDR
The IMPLY logic gate, a memristor-based logic circuit, is described and a methodology for designing this logic family is proposed, based on a general design flow suitable for all deterministic memristive logic families.

A $\mu $ -Controller-Based System for Interfacing Selectorless RRAM Crossbar Arrays

TLDR
A memristor characterization and testing instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing Mt measurement accuracy, and its limitations have been quantified using large-scale nonideal crossbar simulations.

Direct Identification of the Conducting Channels in a Functioning Memristive Device

TLDR
This work probes within a functioning TiO 2 memristor using synchrotron-based x-ray absorption spectromicroscopy and transmission electron microscopy (TEM) and observed that electroforming of the device generated an ordered Ti 4 O 7 Magnéli phase within the initially deposited TiO2 matrix.

Memristor-The missing circuit element

A new two-terminal circuit element-called the memristorcharacterized by a relationship between the charge q(t)\equiv \int_{-\infty}^{t} i(\tau) d \tau and the flux-linkage \varphi(t)\equiv \int_{-