A High-Performance Three-Engine Architecture for H.264/AVC Fractional Motion Estimation

@article{Wu2008AHT,
  title={A High-Performance Three-Engine Architecture for H.264/AVC Fractional Motion Estimation},
  author={Cheng-Long Wu and Chao-Yang Kao and Youn-Long Lin},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2008},
  volume={18},
  pages={662-666}
}
Variable-block-size motion estimation (VBSME) is one of the contributors to H.264/Advanced Video Coding (AVC)'s excellent coding efficiency. Due to its high computational complexity, however, VBSME needs acceleration for real-time high-resolution applications. We propose a high-performance hardware architecture for H.264/AVC fractional motion estimation. Our architecture consists of three parallel processing engines, one for 4 × 4 and 8 × 8 blocks, one for 8 × 4 and 4 × 8 blocks, and another… CONTINUE READING
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