• Corpus ID: 15211567

A HIGH SPEED FPGA IMPLEMENTATION OF AN ENCRYPTION ALGORITHM

@inproceedings{Pekmestzi1999AHS,
  title={A HIGH SPEED FPGA IMPLEMENTATION OF AN ENCRYPTION ALGORITHM},
  author={Kiamal Z. Pekmestzi and N. Moshopoulos and Michael Tsarbopoulos and E. Chaniotakis},
  year={1999}
}
A modular high-speed implementation of the Montgomery Algorithm for the encryption/decryption of data is presented. The circuit is partitioned in well-specified modules in terms of functionality. The architecture of the circuit can easily support pipelining resulting in higher throughput. Considering k the number of bits for the encryption/decryption, (k+2)(k+1)+3 clock cycles are required for the output of the encoded/decoded message. The circuit is implemented in a FPGA and integrated into a… 
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