A Floating-Gate Transmission-Line Model Technique for Measuring Source Resistance in Heterostructure Field-Effect Transistors

@inproceedings{Alamo1989AFT,
  title={A Floating-Gate Transmission-Line Model Technique for Measuring Source Resistance in Heterostructure Field-Effect Transistors},
  author={Jes{\'u}s A. del Alamo and WALID J. AZZAM},
  year={1989}
}
A new simple technique to measure the parasitic source and drain resistances in heterostructure field-effect transistors (HFET) is presented. The technique makes use of the unavoidable gate leakage current of a typical HFET under bias. Floating-gate measurements with current flowing from the source to the drain are carried out in a set of devices with different gate lengths. Extrapolation to zero gate length unequivocally and simultaneously yields both the source and drain resistances. No… CONTINUE READING
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