A Flexible System Level Design Methodology Targeting Run-Time Reconfigurable FPGAs

@article{Berthelot2008AFS,
  title={A Flexible System Level Design Methodology Targeting Run-Time Reconfigurable FPGAs},
  author={Florent Berthelot and Fabienne Nouvel and Dominique Houzet},
  journal={EURASIP J. Emb. Sys.},
  year={2008},
  volume={2008}
}
Reconfigurable computing is certainly one of the most important emerging research topics on digital processing architectures over the last few years. The introduction of run-time reconfiguration (RTR) on FPGAs requires appropriate design flows and methodologies to fully exploit this new functionality. For that purpose, we present an automatic design generation methodology for heterogeneous architectures based on DSPs and FPGAs that ease and speed RTR implementation. We focus on how to take into… CONTINUE READING

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