A Fiber Optic Local Area Network Demonstrator

Abstract

protocols, and in bandwidth-intensive network-oriented applications, being performed at McMaster University in Canada. With the rapid growth in network capacity, it is diff icult to predict what new bandwidth-intensive applications may evolve over the next decade. However, traditional applications such as scientific computing will always demand very high bandwidth networking [2], and new applications such as teleconferencing and virtual reality will l ikely accelerate the need for high bandwidth communications networks. High speed switching and networking is being explored at various locations [3][4]. The basic system architecture of our LAN demonstrator has been described in some recent papers [5][6]. Ref. 5 proposed a scalable optical network architecture for multiprocessing systems and described how the system scales to Terabits of bandwidth. This paper describes our first operational prototypes. The design of a fiber optic local area network (LAN) demonstrator is described. The demonstrator will be used as a t es tbed for research in h igh speed ne twork ing technologies, lean protocols, and bandwidth-intensive network-oriented applications, performed at McMaster University in Canada. A complete LAN system would consist of an array of 16 Pentium-based Personal Computers (PC). Each PC has a "Network Interface Card" (NIC), with a parallel fiber optic datalink to a centralized electrical switch core. The centralized core switches the data generated by 16 NICs, up to 128 Gbit/s of bandwidth, roughly 2 product generations ahead of current 1 Gigabit Ethernet LAN technology. The demonstrator is designed to scale to Terabits of bandwidth using an emerging optoelectronic technology, i.e. integrated CMOS substrates with VCSEL optical I/O. A subset of the complete system has been constructed. We have developed a prototype NIC card, using the Motorola Optobus VCSEL transceivers for the optical datalinks, along with a prototype high speed bipolar switch core, using statically configurable electrical ECL 16x16 crossbar switches, CMOS FPGAs and Motorola Optobus transceivers. We have successfully demonstrated the transmission of high speed packetized data from one NIC card, through 10 meters of parallel fiber ribbon and the centralized switch core, and back to the NIC. This paper will summarize the design and testing of our first demonstration system, and our development towards a Terabit switch core. CPU & Cache

6 Figures and Tables

Cite this paper

@inproceedings{AuAFO, title={A Fiber Optic Local Area Network Demonstrator}, author={Albert Au and Boonchuay Supmonchai and Ted H. Szymanski} }