A Soft Error Tolerant Network-on-Chip Router Pipeline for Multi-Core Systems
The congestion in any regions or the faults in routing nodes, communication links and processing elements(PEs) will affect the NoC performance seriously in the multiprocessor system-on-chip (MPSoC) based on network on chip (NoC). In this paper, the NoC topology is designed which the fault tolerance function is enabled. Its dual-port network interface (NI) makes the key PE have two links with network at least, which can ensure high reliability of the system. The adaptive fault tolerant routing algorithm is also designed that could sense congestion on the network, and the routing nodes can well sense the congestion regions or error nodes on the network to work around the issues effectively. Experiment results demonstrate that the design proposed in this paper can ensure normal network communication and good system performance even if the congestion in routing nodes, communication links, processing elements, or any regions occurs.