A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time

Abstract

A latch-type voltage sense amplifier in 90nm CMOS is designed with a separated input and cross-coupled stage. This separation enables fast operation over a wide common-mode and supply voltage range. With a 1-sigma offset of 8mV, the circuit consumes 92fJ/decision with a 1.2V supply. It has an input equivalent noise of 1.5mV and requires 18ps setup-plus-hold… (More)
DOI: 10.1109/ISSCC.2007.373420

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@article{Schinkel2007ADL, title={A Double-Tail Latch-Type Voltage Sense Amplifier with 18ps Setup+Hold Time}, author={Dani{\"{e}l Schinkel and Eisse Mensink and Eric A. M. Klumperink and Ed van Tuijl and Bram Nauta}, journal={2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers}, year={2007}, pages={314-605} }