A Delay Slot Scheduling Framework for VLIW Architectures in Assembly-Level


A delay slot scheduling framework for VLIW architectures is presented in this paper. In this framework, an assembly data dependence graph is proposed to describe the data dependences among instructions in a basic block. An assembly control flow graph is also proposed to describe control relations among basic blocks. With the help of predicate analysis… (More)
DOI: 10.1109/DASC.2013.67


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